| 摘要 |
Internal control and subroutine logic transfers data between a keyboard input, a random access memory, and a plurality of flip-flop registers to perform arithmetic operations and transfers the results of these operations to a cathode ray tube output display. Power switching is employed in the internal control and subroutine logic so that the operating subroutines and instructions are supplied with power only when they are to be executed. When a random access memory cycle is required, the internal control logic automatically interposes it between the otherwise regularly recurring logic cycles. Encoded transfer vectors are stored and decoded by the subroutine logic to permit unrestricted subroutine returns. In the keyboard input two power supply returns are employed to define one bit of the keyboard encoder. The random access memory is partitioned into one portion addressed by a single bit in the address register and into another, larger portion addressed by the remaining bits in the address register. Each flip-flop of the machine is a J-K flip-flop provided with an adjustable threshold for noise immunity and with a high internal gain on the J-K inputs. The cathode ray tube output display is obtained by selectively blanking portions of a recurring pattern that is generated by integration in only two directions. A tester may be connected to the machine for allowing all subroutines to be operated in a single step mode. The tester is provided with switches for initializing any internal state of the machine or stopping normal execution under any prescribed conditions and with apparatus for accessing the random access memory.
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