发明名称 |
Complementary IGFET Schmitt trigger logic circuit having a variable bias voltage logic gate section |
摘要 |
A logic gate section of a Schmitt trigger circuit has first and second nodes to which variable bias voltages are applied. A first bias control IGFET is connected between the first node and a first potential terminal. A second bias control IGFET is connected between the first node and a second potential terminal. A third bias control IGFET is connected between the second node and the first potential terminal. A fourth bias control IGFET is connected between the second node and the second potential terminal. A control signal to the gates of the first and fourth bias control IGFET's is provided by the Schmitt trigger input signal and the control signal to each of the gates of the third and fourth bias control IGFET's is provided by the Schmitt trigger feedback connection of two series-connected inverters.
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申请公布号 |
US4464587(A) |
申请公布日期 |
1984.08.07 |
申请号 |
US19810295825 |
申请日期 |
1981.08.24 |
申请人 |
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA |
发明人 |
SUZUKI, YASOJI;MATSUO, KENJI |
分类号 |
H03K3/3565;(IPC1-7):H03K3/03;H03K3/35;H03K19/09 |
主分类号 |
H03K3/3565 |
代理机构 |
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主权项 |
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地址 |
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