发明名称 DECODING CIRCUIT
摘要 PURPOSE:To display a difference mode with a high reliability and to constitute a hardware easily by sharing an IC by constituting a mode display part of one bit adder in which the output of a transition detecting part is defined to be an input and an added output to be a mode display signal. CONSTITUTION:At the time of receiving difference code data Din including a transition code TR in the transition detecting part 11, a transition detecting output appears, and '1' is impressed to a first input of the adder 21. Then, it is added to a second input, namely, an input obtained by feeding back an output state '1' or '0' until then. Accordingly, the output of the adder 21, namely, the mode display signal M is alternately inverted for every detection of the transition code in such a manner of 0 1 0 1.... A data reproducing part 14 reproduces data according to a difference mode. When the first difference mode I is designated by the mode display signal M, the difference data of respective picture element is accumulated and added to obtain an output Dout. On the contrary, when the second difference mode II is designated, the difference data is accumulated and added at an interval of a picture element to obtain the output Dout.
申请公布号 JPS6411484(A) 申请公布日期 1989.01.17
申请号 JP19870166841 申请日期 1987.07.06
申请人 FUJITSU LTD 发明人 NISHIZAWA YOSHIJI
分类号 H04N1/413;H04N1/417;H04N19/103;H04N19/132;H04N19/146;H04N19/182;H04N19/196;H04N19/42;H04N19/44;H04N19/46;H04N19/50;H04N19/70;H04N19/85 主分类号 H04N1/413
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