| 摘要 |
PROBLEM TO BE SOLVED: To make the column address strobe signal applicable for all the term by providing NAND circuit which outputs a product of the first clock input signal and a delayed signal of the first clock input signal and further an inverter circuit and also providing a NOR circuit which inputs an output signal of the inverter circuit, the second clock input signal and a detected signal of EDO mode. SOLUTION: A pump circuit into which a first page mode output signal is inputted and another pump circuit into which is inputted a signalϕedo activated in a short cycle of EDO mode are provided in parallel. The signal edo generating circuit generates, from the column address strobe signal/CAS, an output signal G through a delay circuit 7, a NAND circuit 5 and an inverter circuit 6, and further generates the signal edo through NOR circuit 3 from the output signal G, a raw address strobe signal/RAG and a detected signal E of EDO mode. Thereby, the floating-up of substrate voltage which generates at the time of short cycle of EDO is prevented.
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