| 摘要 |
PROBLEM TO BE SOLVED: To realize a data input circuit capable of performing the changeover between a single edge system and a double edge system with a simple constitution. SOLUTION: When an external clock signal is supplied to an internal clock buffer 30, internal clock sinals CK1, CG1 whose phases are different with each other are generated to be supplied to a frequency halving circuit 34. External data are fetched into a data buffer 31 by rising edges of internal clocks CK2, CG2 from the circuit 34 and they are outputted by being separated into odd numbered data and even numberd data as internal data and also control signals are outputted from plural stages of flip-flop circuits 32 and the internal data are fetched into plural stages of data registers 33 to be outputted. Moerover, in the case of the double edge system, the internal clock signals CK1, CG1 are not frequency-divided to be outputted in the same waveform and in the case of the sigle edge system, they are frequency-halved to be outputted. |
