METHOD AND CIRCUIT FOR SIGNATURE COMPRESSION

摘要

PURPOSE: A method and a circuit for compressing signature are provided which compresses the current pattern more than twice before the next pattern is output from an object circuit to be tested, to prevent error masking due to repetitive error patterns. CONSTITUTION: A signature compressing circuit that compresses response data from an object circuit to be tested includes a buffer(42), a clock generator(48) and a compressing unit(44). The buffer is synchronized with the first clock to latch the response data from the object circuit. The clock generator generates the second clock having a frequency twice the frequency of the first clock. The compressing unit is synchronized with the second clock to compress the response data sent from the buffer. The compressing unit includes a multiple input signature register.