发明名称 |
System integrated circuit with monitoring means of internal buses |
摘要 |
<p>A system integrated circuit that identifies the cause of a malfunction even if the number of output terminals of a system LSI to be assigned to internal buses in the system LSI is strictly restricted. Comparators 11 to 15 are connected to any of a plurality of buses. Each comparator judges whether a certain expected value matches data transferred on a bus connected to the comparator. The selector unit 10 selects one of the plurality of buses in accordance with the judgement result of the comparator, and outputs data transferred on the selected bus to outside the system integrated circuit so that an observer can observe internal state of the system integrated circuit from outside.</p> |
申请公布号 |
EP1102169(A1) |
申请公布日期 |
2001.05.23 |
申请号 |
EP20000310135 |
申请日期 |
2000.11.15 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KITAMURA, TOMOHIKO;OSAKA, MASATAKA;SEKIBE, TSUTOMU |
分类号 |
G06F15/78;G06F11/22;G06F11/36;G06F13/36;(IPC1-7):G06F11/36 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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