发明名称 FRAME SYNCHRONIZING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a frame synchronizing circuit which excellently operates even in a propagation environment where identical-channel interference waves are present. SOLUTION: A base band signal generator 42 converts the received signal from an antenna 41 down into a receive base band signal. A parameter arithmetic circuit 46 outputs a weighting coefficient at intervals of sampling time Ts from the received base band signal and error signals so that the square of the mean of the error signals becomes minimum. A composing means 4b multiplies the base band signal by the weighting coefficient updated at intervals of the sampling time Ts through a complex multiplier 43 and adds the signal b at complex adder 44 to output an array output signal. A frame timing detecting means 4d detects the synchronous timing of a frame from an error signal as the difference between the array output signal and a reference signal and outputs the timing.
申请公布号 JP2002204227(A) 申请公布日期 2002.07.19
申请号 JP20000400942 申请日期 2000.12.28
申请人 KYOCERA CORP;KDDI CORP;KDDI RESEARCH & DEVELOPMENT LABORATORIES INC 发明人 ISHI TAKASHI;EN HIROSHI;OZEKI TAKEO
分类号 H01Q3/26;H04J3/06;H04L7/08 主分类号 H01Q3/26
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