发明名称 METHOD AND DEVICE FOR CMP, METHOD AND SYSTEM FOR CIRCUIT FORMATION AND INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent erosion and dishing of a damascene wiring when a conductor is subjected to first polishing until a barrier film is exposed, and thereafter a barrier film is subjected to second polishing until an interlaminar film is exposed for forming a damascene wiring of a circuit base wherein a conductor is deposited via a barrier film in a recessed groove of an interlaminar film. SOLUTION: A surface of a circuit base is cleaned (Step T4) by treatment liquid before second polishing (Step T7) after it is subjected to first polishing (Step T2). Consequently, complex generated by reaction between polishing liquid and a conductor of first polishing can be removed before execution of second polishing, thus preventing erosion and dishing of a damascene wiring.
申请公布号 JP2002141312(A) 申请公布日期 2002.05.17
申请号 JP20000336277 申请日期 2000.11.02
申请人 NEC CORP 发明人 KUBO TORU;TSUCHIYA YASUAKI;WAKE TOMOKO
分类号 B24B37/00;H01L21/02;H01L21/302;H01L21/304;H01L21/306;H01L21/321;H01L21/461;H01L21/768 主分类号 B24B37/00
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