发明名称 Method of fabricating a semiconductor assembly including chip scale package and second substrate with exposed substrate surfaces on upper and lower sides
摘要 A semiconductor multi-package module has stacked lower and upper packages, each package including a die attached to a substrate, in which the upper and lower substrates are interconnected by wire bonding, and in which the upper package is inverted. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
申请公布号 US7358115(B2) 申请公布日期 2008.04.15
申请号 US20070626232 申请日期 2007.01.23
申请人 CHIPPAC, INC. 发明人 KARNEZOS MARCOS
分类号 H01L21/48;B23K31/02;H01K1/14;H01L23/02 主分类号 H01L21/48
代理机构 代理人
主权项
地址