发明名称 CHANNEL QUALITY MONITOR
摘要 PROBLEM TO BE SOLVED: To provide a channel quality monitor that clarifies a monitor time when channel quality monitor data are generated so as to clarify the validity of data and clarify the relationship between a generated time and a register storing the channel quality monitor data. SOLUTION: The channel quality monitor comprises a microprocessor(MPU) 100, a data summing circuit 102 that sums data received from a data input terminal 101, a clock 104 that has a clock data setting terminal 103, a time data conversion circuit 105 that converts time data in the unit of 'hour: minute: second' into data in the unit of seconds, a reference time generating circuit 106 that outputs a reference time, a reference time adder circuit 107 that sums reference times, a valid time discrimination circuit 109 that compares the reference time sum data with a time setting value from a valid time setting terminal 108 and provides an output to the MPU 100, and registers 1-96 that are connected to the MPU 100.
申请公布号 JP2002141969(A) 申请公布日期 2002.05.17
申请号 JP20000330518 申请日期 2000.10.30
申请人 NEC ENG LTD 发明人 YAMAMURO MASAKI
分类号 H04L1/00;H04B17/00;H04L29/14 主分类号 H04L1/00
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