| 摘要 |
Provided are a cache memory device, shared by a plurality (at least two) of processors, and an electronic system comprising the same. The cache memory device comprises: a cache memory storing some of data stored in a main memory and accessed by the plurality (at least two) of processors; and a cache controller storing quality of service (QoS) information of each of the plurality of processors and differently allocating a size of a storing space to be managed by a relevant processor in the cache memory, based on the QOS information of the relevant processor. Accordingly, the present invention provides a cache memory device capable of differently controlling performance of each processor. |
