发明名称 バリスタ機能付き積層型半導体セラミックコンデンサとその製造方法
摘要 A component body is obtained by alternately laminating and sintering a plurality of semiconductor ceramic layers formed of a SrTiO3-based grain boundary insulated semiconductor ceramic and a plurality of internal electrode layers. The average grain diameter of crystal grains is 1.0 ∝m or less and a coefficient of variation representing variations in a grain diameter of the crystal grains is 30% or less. To prepare the semiconductor ceramic an Sr compound, a Ti compound and a donor compound are weighed in predetermined amounts and mixed/pulverized. A calcined powder is prepared and a dispersant is added with an acceptor compound to the calcined powder. The resulting mixture is wet-mixed and a heat-treated powder is prepared. The heat-treated powder is formed into slurry and subjected to a filter treatment. The filtered slurry is used to prepare a semiconductor ceramic. The resulting laminated semiconductor ceramic capacitor has a varistor function having excellent durability, which can suppress a reduction of insulating properties and ensure desired electrical characteristics even when ESD occurs repeatedly.
申请公布号 JP5975370(B2) 申请公布日期 2016.08.23
申请号 JP20150547700 申请日期 2014.10.16
申请人 株式会社村田製作所 发明人 川本 光俊
分类号 H01G4/12;H01B3/12;H01G4/30 主分类号 H01G4/12
代理机构 代理人
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