发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To prevent a soft error from occurring by a method wherein a barrier semiconductor is formed of a first conductivity type layer compensated with impurities of the first conductivity type and the opposite second conductivity type. CONSTITUTION:A POS static memory is provided with an n-type Si substrate 11, a p-type well 12, and an n<+> impurity layer 13 of a memory node in which a memory cell information charge is stored. It comprises a gate electrode 19 of a memory cell transferring MOS, an n<+> impurity layer 15 connected with a data wire, and a p layer 14 partially compensated with an n-type impurity provided under a memory node By these processes, a barrier layer can be obtained which prevents influx of noise charges effectively even at the temperature lower than 100 deg.K.
申请公布号 JPS63301559(A) 申请公布日期 1988.12.08
申请号 JP19880010644 申请日期 1988.01.22
申请人 HITACHI LTD 发明人 AOKI MASAAKI;YANO KAZUO;MASUHARA TOSHIAKI
分类号 H01L27/11;H01L21/8244;H01L27/10 主分类号 H01L27/11
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