发明名称 Apparatus and method for reading multi-level data stored in a semiconductor memory
摘要 A semiconductor memory including memory cells, word lines, bit lines, a row decoder, column decoder, a voltage-changing circuit, a sense amplifier, and an output circuit. Each memory cell stores multi-level data. The row decoder selects one of the word lines in accordance with an address signal. The voltage-changing circuit generates different voltages, which are applied to the row decoder. The different voltages are sequentially applied from the voltage-changing circuit to the word line selected by the row decoder. The column decoder selects a bit line every time the potential of the word line changes. The sense amplifier detects the data read from the memory cell onto the bit line every time the potential of the word line changes. The output circuit converts the data to code data.
申请公布号 US5852575(A) 申请公布日期 1998.12.22
申请号 US19970819052 申请日期 1997.03.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SUGIURA, NOBUTAKE;KATO, HIDEO;MOCHIZUKI, YOSHIO
分类号 G11C11/56;G11C16/02;G11C16/04;G11C16/06;H01L21/8246;H01L27/112;(IPC1-7):G11C11/34 主分类号 G11C11/56
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