| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device which enables an improvement in chip performance by solving the problem that a frequency characteristic of RAM is restrained by write operation. SOLUTION: An internal clock generating circuit receiving a clock signal supplied from the outside to generate an internal clock signal supplied to a random access memory includes; a circuit 10 for canceling internal clock generation generating a signal activating an internal clock signal ICLK during operation based on an external clock signal CLK, a chip select signal CSB, and a write enable signal WEB; and a circuit 11 for setting the internal clock signal ICLK based on an output SCL of the circuit 10 for canceling the internal clock generation and for resetting the internal clock signal based on an internal clock reset signal RCL. A dummy cycle is provided next to a write cycle. COPYRIGHT: (C)2006,JPO&NCIPI
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