发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To accelerate the speed of a semiconductor device including a CAM, or to reduce power consumption. SOLUTION: Control clocks having different phases are distributed to a memory array divided into a plurality of banks BK1, BK2, the entry and processing of a retrieving key (reading and writing operation, retrieving operation) are performed with different phases. The banked memory array is constituted of a plurality of sub-arrays SARYU, SARYL divided smaller, and two sub-arrays SARYU, SARYL share a sense amplifier in a retrieving circuit group RWSBK. At this time, this constitution is an open bit-line constitution in which bit lines are connected to the sense amplifier one by one from both the sub-arrays SARYU, SARYL. One and the same retrieving table is registered to the plurality of banks BK1, BK2, continuously inputted retrieving keys are inputted to the plurality of banks BK1, BK2 successively, and retrieving operation is performed synchronized with the control clock of a different phase. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006228325(A) 申请公布日期 2006.08.31
申请号 JP20050040885 申请日期 2005.02.17
申请人 HITACHI LTD;ELPIDA MEMORY INC 发明人 HANZAWA SATORU;TAKEMURA RIICHIRO;KAJITANI KAZUHIKO
分类号 G11C15/04 主分类号 G11C15/04
代理机构 代理人
主权项
地址