| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device provided with a memory circuit having a word line selecting circuit in which a leak current is reduced. SOLUTION: The device includes second word lines to which memory cells are connected, a plurality of bit lines extended in a direction orthogonal to the second word lines and connected electrically to memory cells corresponding to the selected second word line out of a plurality of second word lines, and a word driver constituted of a CMOS inverter circuit performing the selection/non-selection of the second word lines, a voltage corresponding to the selection level of the second word line is supplied to the source of a P channel MOSFET constituting a plurality of word drivers including the second word line corresponding to the selected bit line, and a voltage corresponding to the non-selection level is supplied to the source of the P channel MOSFET of the other word driver. COPYRIGHT: (C)2006,JPO&NCIPI
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