| 摘要 |
PROBLEM TO BE SOLVED: To decrease a leakage current at the time of standby due to short circuit of a row and a column in a semiconductor memory chip. SOLUTION: In the case of a row of a memory pre-charged to negative word line voltage (VNWL), that is a word line, when a gate of an insulation (ISO) transistor connected to the short-circuited word line and digit line is held at the VNWL level by an insulation signal driven to the VNWL level during a standby state of the row of the memory, the leakage current at the time of standby passing through a P sense amplifier in the memory is almost prevented. Since the leakage current at the time of standby is decreased, whole consumption of a current Icc is decreased from supply voltage of operation voltage of a memory circuit, thereby, power consumption of the circuit at the time of standby is decreased. COPYRIGHT: (C)2006,JPO&NCIPI
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