| 摘要 |
<p>A non-volatile semiconductor memory device comprises memory cells (MC1, MC2) consisting of MOS transistors of a floating gate structure. Data stored in the memory cells is erasable by means of irradiation of ultraviolet rays. Insulating layer (21) is formed above the memory cells (MC1, MC2). Wiring layer (23) is formed on insulating layer (21). Wiring layer (23) is formed substantially parallel to control gate electrode (17a, 17b) which extends horizontally at right angles and has a width ( DELTA W) greater than the width ( DELTA Wa, DELTA Wb) of control gate electrode (17a, 17b). A least one of opposing sides of wiring layer (23) which extend horizontally and at right angles to the channel is located on said floating gate electrode (15a, 15b) or on the extension lines (100a, 100b) drawn from one of opposing sides of said floating gate electrode (15a, 15b) which extend horizontally and at right angles to the channel.</p> |
