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发明名称
PULSE PHASE DELAY CIRCUIT, DELAY AMOUNT CORRECTING METHOD, CORRECTION CIRCUIT AND VERTICAL SYNCHRONIZING SIGNAL PROCESSING CIRCUIT
摘要
申请公布号
JPH11155083(A)
申请公布日期
1999.06.08
申请号
JP19970320905
申请日期
1997.11.21
申请人
MATSUSHITA ELECTRIC IND CO LTD
发明人
SATO TOSHICHIKA
分类号
H04N5/04;H04N3/24;H04N5/06;H04N5/12;H04N5/66;H04N5/783;H04N5/93;(IPC1-7):H04N5/12
主分类号
H04N5/04
代理机构
代理人
主权项
地址
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