发明名称 A METHOD RELATING TO PROCESSORS, AND PROCESSORS ADAPTED TO FUNCTION IN ACCORDANCE WITH THE METHOD
摘要 The present invention relates to a method of utilizing information made available in a bit error check of data words belonging to instructions read into a processor having a first (11) and a second (11') calculating unit which operate in parallel with one another, a so-called double processor mode. The processor structure also comprises a third and a fourth calculating unit (13, 13') intended for continuously checking for possible bit errors in read-in data words, a comparator (14) for comparing output data from parallel operating units (11, 11'), a diagnostic unit (15) adapted to determine which of the calculating units delivered correct output data when detecting a difference in output data in the comparator (14), and a control unit (16) adapted to control that the output data from the processor structure (1) originates from a calculating unit that has delivered correct output data. The processor switches to a single processor mode when a difference in output data is detected in the comparator. The data words are read directly into respective calculating units (11, 11') without correction for possible bit errors when the processor operates in a double processor mode, and the information from the third and fourth calculating units (13, 13') is used to effect said determination in the diagnostic unit (15). Bit error control and bit error correction are used in a known manner when the processor operates in a single processor mode.
申请公布号 WO9930235(A3) 申请公布日期 1999.08.26
申请号 WO1998SE02267 申请日期 1998.12.09
申请人 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) 发明人 ROSENDAHL, MICHAEL;JONSSON, TOMAS, LARS;HOLMBERG, PER, ANDERS
分类号 G06F11/10;G06F11/16;G06F11/18 主分类号 G06F11/10
代理机构 代理人
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