发明名称 Partial semiconductor wafer processing using wafermap display
摘要 Partial wafer processing is achieved by down loading the wafer map of the whole wafer from a host (2) and display the whole wafer in the die bonder monitor (3) move the wafer table to a first die pickup position (4) and move the display cursor to the first die pickup position (5) and teach two limit die coordinates in X direction (6) and teach two limit die coordinates in Y direction (7) and then using limit die coordinates as information remove other partial wafer die coordinates from the map (8) and select die pickup sequence (9).
申请公布号 US6156625(A) 申请公布日期 2000.12.05
申请号 US19990262554 申请日期 1999.03.04
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 BALAMURUGAN, SUBRAMANIAN
分类号 H01L21/00;H01L21/68;(IPC1-7):H01L21/46;H01L21/78;H01L21/301;G01C17/38;G01P21/00 主分类号 H01L21/00
代理机构 代理人
主权项
地址