| 摘要 |
<p>An FP (22) has a plurality of entries for holding a request to perform a processing and is provided with an already-requested flag indicating that a data transfer request has once been made for each entry. Information indicating an entry holding the oldest request is held in an FP-TOQ (23). A data transfer request inhibit judging circuit (25) checks the already-requested flag of the request to perform the processing and the FP-TOQ (23) and, if a data transfer request which is subject to the request to perform the processing has already been issued and the entry in which the request to perform the processing is held is not the entry shown by the FP-TOQ (23), transmits a signal to inhibit the data transfer request to a data transfer request control circuit (27). Even if a cache miss occurs in a primary cache RAM (21) if receiving a signal to inhibit a data transfer request, the data transfer request control circuit (27) does not issue the data transfer request. This prevents the unwanted replacement of data on a cache.</p> |
