发明名称 CLEANING METHOD FOR VIA-HOLE BOTTOM, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce resistance by effectively removing copper oxide that is formed on a surface of Cu wiring on a via-hole bottom even with a narrow pattern without exerting adverse influences upon a base insulating film and without occurrence of scattering copper.SOLUTION: When reducing and removing copper oxide on a surface of lower layer copper wiring exposed on a via-hole bottom prior to forming the copper wiring on a trench of a predetermined pattern and a via-hole connected from the trench to the lower layer copper wiring on a substrate including an interlayer insulating film with which the trench and the via-hole are formed on its surface, a reduction species containing a metal of which the oxidation tendency is higher than that of copper and of which the oxide has electroresistance lower than copper oxide while having a reduction capability with respect to copper oxide is supplied to the via-hole bottom. The copper oxide is reduced and removed by making the metal in the reduction species react with the copper oxide on the surface of the lower layer copper wiring, and the oxide of the metal contained in the reduction species is formed.SELECTED DRAWING: Figure 1
申请公布号 JP2016167545(A) 申请公布日期 2016.09.15
申请号 JP20150047015 申请日期 2015.03.10
申请人 TOKYO ELECTRON LTD 发明人 MATSUMOTO KENJI
分类号 H01L21/768;C23C14/02;C23C14/14;C23C16/02;C25D5/34;C25D7/12;H01L21/3205;H01L23/532 主分类号 H01L21/768
代理机构 代理人
主权项
地址