| 摘要 |
This device is used for creating microprocessor systems. It ensures full compatibility between the permanent period schemes and a coefficient for filling the synchronizing signal at a maximum, quick effect of the system. The device consists of interlinked first and second double inlets, logical element "AND-NO", first and second inverter, a register with mandatory nullifying, a first and second D-trigger, first, second and third double-inlet switches, and a multi-inlet logical element "AND-NO".
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