发明名称 Method of manufacturing high and low voltage CMOS transistors on a single chip
摘要 A semiconductor device where high voltage CMOS transistors and low voltage CMOS transistors are installed on a single chip, is manufactured by a silicon gate CMOS process. In order to reduce the number of repetitions of photolithographic process, low voltage N channel transistor domains and high voltage P channel transistor domains are simultaneously implanted by B ion, and low voltage P channel transistor domains and high voltage N channel transistor domains are simultaneously implanted by P ion.
申请公布号 US5254487(A) 申请公布日期 1993.10.19
申请号 US19930021028 申请日期 1993.02.23
申请人 NEC CORPORATION 发明人 TAMAGAWA, AKIO
分类号 H01L27/092;H01L21/8238;H01L27/088;(IPC1-7):H01L21/266 主分类号 H01L27/092
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