发明名称 Method for multi-layer printed wiring board design
摘要 <p>A first signal plane (22) having a first conductor pitch and dielectric thickness, is provided for critical signals determined based on sensitivity to cross-talk and line resistance. A second signal plane (24) having a conductor density of approximately a factor of four greater than the first signal plane and reduced dielectric thickness, is provided for non-critical signals. Multi-layer arrangements employing signal planes of the first and second types are combined in printed wiring boards for multi-chip module systems to provide maximum overall density with greatest miniaturization while maintaining signal integrity and adapting available design processes for cost-effective implementation. <IMAGE></p>
申请公布号 EP0644596(B1) 申请公布日期 1999.11.17
申请号 EP19940113128 申请日期 1994.08.23
申请人 FUJITSU LIMITED 发明人 WHEELER, RICHARD L.
分类号 H05K3/00;G06F17/50;H01L23/538;H05K3/46;(IPC1-7):H01L23/538 主分类号 H05K3/00
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