发明名称 SYSTEM AND METHOD FOR SAMPLING TIMING ERROR REDUCTION
摘要 <p>A system clock for a system for measuring at least one given quantity having a value which does not vary significantly from a given frequency, the system clock comprises a controller for sampling said given quantity at a rate determined by an oscillator frequency, and a programmable oscillator for generating the oscillator frequency, said programmable oscillator being programmable to produce said oscillator frequency which is substantially identical to a high order harmonic of said given frequency of the quantity to be measured.</p>
申请公布号 WO2002063318(A2) 申请公布日期 2002.08.15
申请号 US2002003520 申请日期 2002.02.07
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