发明名称 GATE ELECTRODE STRESS CONTROL FOR FINFET PERFORMANCE ENHANCEMENT
摘要 A finFET and its method for fabrication include a gate electrode formed over a channel region of a semiconductor fin. The semiconductor fin has a crystallographic orientation and an axially specific piezoresistance coefficient. The gate electrode is formed with an intrinsic stress determined to influence, and preferably optimize, charge carrier mobility within the channel region. To that end, the intrinsic stress preferably provides induced axial stresses within the gate electrode and semiconductor fin channel region that complement the axially specific piezoresistance coefficient.
申请公布号 US2007096206(A1) 申请公布日期 2007.05.03
申请号 US20050163908 申请日期 2005.11.03
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHIDAMBARRAO DURESETI
分类号 H01L27/12;H01L27/01;H01L31/0392 主分类号 H01L27/12
代理机构 代理人
主权项
地址
您可能感兴趣的专利