| 摘要 |
<p>PURPOSE:To eliminate an overerasing state of a memory transistor and to improve yield of a chip by executing a writing before erasing in all memory cells and redundant memory cells before batch erasing, and writing '0'. CONSTITUTION:At the time of writing before erasing, a decoder 80 outputs a row address to a row decoder 2, and outputs a predecoding signal to a spare decoder 60. In this case, the decoder 60 is nonactivated by the output of a spare activating circuit 50. Even if a predecoding signal for designating a spare word line is sent from the decoder 80, a switching circuit 81 does not select a spare word line in a spare row 90, but outputs an 'H' signal -NED to the decoder 2. Accordingly, writing before erasing is conducted in a memory cell connected to an improper word line. When this selection is finished, a spare address signal is sequentially switched, and the writing before erasing is sequentially conducted at a spare word line unit. Thus, a memory transistor is not overerased, but yield of a chip is improved.</p> |
