发明名称 Pattern generator circuit for semiconductor test system
摘要 A pattern generator that makes it possible to use various option pattern generators (PGs) without changing hardware is realized. To accomplish this, an option circuit includes an option PG initial clock control section that generates an initial clock signal in synchronism with a clock signal to initialize the option PGs; a plurality of option PGs selectively receive one of a plurality of clock output signals of a clock output control section and generate pattern and clock signals; and in a multiplexer which selects one of output signals from the plurality of PGs through an instruction from a select register 24, and a FIFO section which receives a signal from the multiplexer as write data and a write clock, and an output signal of a read clock control section as a read clock, and outputs a signal to a logic circuit as the option PG output signal.
申请公布号 US5852619(A) 申请公布日期 1998.12.22
申请号 US19970986469 申请日期 1997.12.08
申请人 ADVANTEST CORP. 发明人 SHIMURA, MICHIO
分类号 G01R31/3183;G01R31/3181;(IPC1-7):G06F11/00 主分类号 G01R31/3183
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