发明名称 Smart retry system that reduces wasted bus transactions associated with master retries
摘要 The present invention comprises a smart retry system for agents in a computer system. The smart retry system of the present invention includes a master agent, a slave agent, an arbiter, and smart retry logic components, all adapted to be coupled to a bus. The bus permits agents coupled to the bus to communicate with the arbiter and other agents coupled to the PCI bus. The smart retry logic component of the present invention prevents a PCI master agent from accessing the bus for the purpose of attempting a retry transaction, until after the slave agent that issued the retry is ready.
申请公布号 US6397279(B1) 申请公布日期 2002.05.28
申请号 US19980003864 申请日期 1998.01.07
申请人 VLSI TECHNOLOGY, INC. 发明人 JARAMILLO KEN;KNUDSEN CARL J.
分类号 G06F13/364;(IPC1-7):G06F13/00 主分类号 G06F13/364
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