发明名称 SENSITIVE SELF-CLOCK TYPE RECEIVER FOR MULTI-CHIP SUPER- CONDUCTOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a receiver for providing inter-chip communication in a super-conductor integrated circuit. SOLUTION: A receiver (50) is provided with a detector circuit (52) for asynchronously receiving input currents, a splitter circuit (60) connected to a detector circuit (52) for generating first and second signals, a delay circuit (62) for receiving a second signal from the splitter circuit for generating a delayed signal, and a register circuit (64) for receiving a first signal from the splitter circuit (60) and a delayed signal from the delay circuit (62) in order to generate a signal flux quantum(SFQ) pulse. Thus, the receiver (50) is able to provide inter-asynchronous chip communication in a multi-chip super-conductor circuit having low input currents without using any external RF clock.
申请公布号 JP2002330065(A) 申请公布日期 2002.11.15
申请号 JP20020082343 申请日期 2002.03.25
申请人 TRW INC 发明人 HERR QUENTIN P;JOHNSON MARK W
分类号 H03K3/38;H03K19/195;H04L7/00 主分类号 H03K3/38
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