NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING CONSTANT BIT LINE PRECHARGE LEVEL BY COMPENSATING THE CHANGES OF THE BIT LINE PRECHARGE LEVEL DUE TO THE TEMPERATURE CHANGES

摘要

PURPOSE: A nonvolatile semiconductor memory device having constant bit line precharge level is provided to reduce the reading error by compensating the changes of the bit line precharge level due to the temperature changes. CONSTITUTION: A nonvolatile semiconductor memory device comprises an electrically programmable memory cell array(100) connected with plural word lines(WL) and plural bitlines(BL); a bit line power supply circuit(400) for supplying bit line voltages to the plural bitlines; a shut off circuit(200) connected between the memory cell array and the bit line power supply circuit, for electrically connecting or disconnecting the memory cell array to/from the bit line power supply circuit; a shut off control circuit(300) for controlling the shut off circuit(200). Wherein, the shut off circuit(200) consists of NMOS transistors of which a gate is connected to the shut off control circuit(300), a drain is connected to the bit line power supply circuit(400) and a source is connected to the bit line, and the shut off control circuit(300) compensates the changes of the bit line precharge level due to the temperature changes by controlling the gate voltage(BLSHF) of a shut off transistor(T100).