发明名称 Methode und Struktur zur Integration passiver Komponenten auf flexiblen Filmlagen
摘要 A method for fabricating a flexible interconnect film includes applying a resistor layer (16,18) over one or both surfaces of a dielectric film (10); applying a metallization layer (22) over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallization layer; applying a capacitor dielectric layer (24a) over the metallization layer; and applying a capacitor electrode layer (26a) over the capacitor dielectric layer. The capacitor electrode layer is patterned to form a first capacitor electrode; the capacitor dielectric layer is patterned; the metallization layer is patterned to form a resistor (28); and the metallization layer and the resistor layer are patterned to form an inductor (33) and a second capacitor electrode. In one embodiment, the dielectric film includes a polyimide, the resistor layer includes tantalum nitride, and the capacitor dielectric layer includes amorphous hydrogenated carbon or tantalum oxide. If the resistor and metallization layers are applied over both surfaces of the dielectric film, passive components can be fabricated on both surfaces of the dielectric film. The dielectric film can have vias therein with the resistor and metallization layers extending through the vias. A circuit chip can be attached and coupled to the passive components by metallization patterned through vias in an additional dielectric layer. <IMAGE>
申请公布号 DE69738748(D1) 申请公布日期 2008.07.17
申请号 DE1997638748 申请日期 1997.08.01
申请人 GENERAL ELECTRIC CO. 发明人 SAIA, RICHARD JOSEPH;DUROCHER, KEVIN MATTHEW;COLE, HERBERT STANLEY
分类号 H01L23/538;H05K3/46;H01L21/48;H01L21/68;H01L21/822;H01L21/98;H01L23/498;H01L25/16;H01L27/04;H05K1/16;H05K3/38;H05K3/40;H05K3/42 主分类号 H01L23/538
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