PLL SYSTEM TIMING EXTRACTING CIRCUIT,申请号JP19890297501-传众专利搜索

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发明名称	PLL SYSTEM TIMING EXTRACTING CIRCUIT
摘要
申请公布号	JPH03159420(A)	申请公布日期	1991.07.09
申请号	JP19890297501	申请日期	1989.11.17
申请人	OKI ELECTRIC IND CO LTD	发明人	ATSUTA KAZUNARI;SAITO SATOKAZU;HIROSE KUNIHARU
分类号	H03L7/10	主分类号	H03L7/10
代理机构		代理人
主权项
地址

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