发明名称 SAMPLE HOLD CIRCUIT AND A/D CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a sample hold circuit using perfect differential operation implifier which is increase in operational stability, and the stability and precision of A/D converter by sustaining the equilibrium point shift of the mean value of the differential output signal. SOLUTION: The common mode feedback circuit 2 to which the common mode hold capacity CF1 and CF2 are connected at each input terminal IN1 and IN2 of the complete differential operation calculation amplifying circuit 1, in the sample period, the equilibrium point is set as the mean value of differential output signal from the output terminal OUT1 and OUT2 by charging the common mode feedback hold capacity CF1 and CF2 via reset switch RS1 and RS2 which connect between input terminal IN1 and IN2 and output terminal OUT1 and OUT2, while in the hold period, the equilibrium point of the mean value of the differential signals is maintained by the electric load charged at the common mode feedback hold capacity CF1 and CF2 despite the differential output signals.
申请公布号 JP2002163894(A) 申请公布日期 2002.06.07
申请号 JP20000357698 申请日期 2000.11.24
申请人 NIPPON PRECISION CIRCUITS INC;SUGIMOTO YASUHIRO 发明人 MIYABE SATORU;SUGIMOTO YASUHIRO
分类号 G11C27/02;H03M1/44;(IPC1-7):G11C27/02 主分类号 G11C27/02
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