| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce a memory area required for data transmission and reception between CPUs. <P>SOLUTION: In this signal processing circuit, the CPU 1 of a data transfer side is not provided with an output buffer, and data to be transferred to the CPU 2 of a receiving side is directly written in the input buffer of the CPU 2 of the receiving side by using a DMA control circuit 9. Consequently, it is possible to reduce memory capacity required for data transfer between a plurality of CPUs. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
