发明名称 Methods of forming integrated circuitry and methods of forming local interconnects
摘要 In one implementation, field oxide is grown within bulk semiconductive material in a first circuitry area and not over immediately adjacent bulk semiconductive material in a second circuitry area. The field oxide is etched from the first circuitry area. After the etching, a circuit component is formed in the first circuitry area and a circuit component is formed in the second circuitry area. Dielectric material is formed over the first and second circuitry areas. The dielectric material comprises a conductive contact extending outwardly from the circuit component in the first circuitry area. The dielectric material has a first outermost surface. A portion of the dielectric material and a portion of the conductive contact are removed to form a second outermost surface of the dielectric material which has greater degree of planarity than did the first outermost surface. Other aspects are contemplated.
申请公布号 US7364997(B2) 申请公布日期 2008.04.29
申请号 US20050177678 申请日期 2005.07.07
申请人 MICRON TECHNOLOGY, INC. 发明人 JUENGLING WERNER
分类号 H01L21/20 主分类号 H01L21/20
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