发明名称 TEST SYSTEM OF COMPUTER SYSTEM
摘要 PURPOSE:To attain the collation of an optional data pattern and to test a function of a transfer device by transferring said data pattern to a pseudo input/ output device via the transfer device and then writing again the pattern to a memory via the transfer device. CONSTITUTION:A central processor 1 controls transfer devices 3 and 4 and connects logically pseudo input/output devices 5 and 6. The data at a part A of a memory 2 is transferred to the device 5 via the device 3. The data of the device 5 is sent to the device 6 and stored at a part B of the memory 2 via the device 4. The data of the part B is compared with that of the part A to test the functions of the devices 3 and 4. It is possible to have a test only among the memory 2, the device 3 and the device 5 or among the memory 2, the device 4 and the device 6 with transfer of data.
申请公布号 JPS59111546(A) 申请公布日期 1984.06.27
申请号 JP19820220673 申请日期 1982.12.16
申请人 FUJITSU KK 发明人 SUEYOSHI MINORU
分类号 G06F11/22;G06F11/273 主分类号 G06F11/22
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