| 摘要 |
PURPOSE:To avoid a system breakdown due to an error of a front end by providing an interface switching function among plural front ends which control the transfer of data between a central processor and plural input/output controllers. CONSTITUTION:Front ends FE#D3a and FE#13b have channel device numbers 0 and 1 respectively. An interface switching circuit RQSL2 is set between a CPU1 and front ends 3a and 3b together with the 2nd switching circuit In SEL4 provided between front ends 3a/3b and input/output controllers respectively. When an error is detected with an FE#1, and interruption is given to the CPU1 through an ERR#1. Then the CPU1 turns on CHGSL#0 of a front end FE#0 and restarts the transfer of data of the FE#13b by means of an FE#3a. |
