发明名称 DEFECT RECOVERING SYSTEM FOR ROM
摘要 PURPOSE:To recover a defect within one address occurring in a ROM and to improve yield by providing a circuit for storing a defect address, a defective pattern memory circuit and whether a defect exists or not in a chip. CONSTITUTION:An LSI tester for testing whether a ROM chip has a manufacturing defect or not is used. Addresses of 2<19> from all '0' to all '1' are applied address pins A0 - A18, and outputs from data pins D0 - D7 are compared with expected values. As a result, if a defect is discovered at an address X, the address X is stored in a fuse 40 (fuse 0), so-called 'data' in a fuse 70 (fuse 2), and written in a fuse 50 (fuse 1). After the defect is recovered, a 19-bit comparator 60 compares address signals A0 - A18 with the addresses of the fuse 0, outputs the value of the fuse 2 in the case of coincidence, and outputs the value of ROM10 to the pins D0 - D7 in the case of discordance.
申请公布号 JPH04155696(A) 申请公布日期 1992.05.28
申请号 JP19900279010 申请日期 1990.10.19
申请人 HITACHI LTD 发明人 IWASAKI KAZUHIKO;SATO YUJI;SHIBATA TAKASHI;TAKANASHI AKIRA;YAMAGUCHI NOBORU
分类号 G11C17/00 主分类号 G11C17/00
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