发明名称 NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To lower the breakdown voltage between a floating gate and a control gate, to suppress reverse tunneling failure by embedding an oxide film in the sidewalls of adjacent floating gates. SOLUTION: An oxide film 50 is embedded in the sidewalls of adjacent floating gates 34 along the length of the control gate 36, formed via a tunnel oxide film on a floating gate 3 so as to straddle thereon, thereby blocking the control gate 36 from running around the sidewall of the floating gate 34 and allowing the capacitive coupling ratio to be lowered, as compared with that in prior art. If mask deviation occurs between an element isolating film forming mask and a floating gate forming mask, since the control gate 36 will not touch a substrate 31, there is no need of high alignment accuracy between the floating gate and the element isolating film.
申请公布号 JP2000183192(A) 申请公布日期 2000.06.30
申请号 JP19980361127 申请日期 1998.12.18
申请人 SANYO ELECTRIC CO LTD 发明人 KAWAKAMI KAZUYUKI
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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