发明名称
摘要 PURPOSE:To improve picture quality, to simplify a generation circuit, and to provide an arbitrary deformation ratio by performing a sum of products arithmetic operation by reflecting the decimal part of a deformation ratio and that of a coordinate value. CONSTITUTION:A coordinate transformation circuit 8 in a processing means 2 sends the integer part (X', Y') of inversely transformed coordinate P (X, Y) and the deformation ratio, for example, the integer part r' of reduction ratio (r) (rational number including a decimal) to a memory access circuit 9, and also, the coordinate transformation circuit 8 sends the decimal part (X'', Y'') of the inversely transformed coordinate P (X, Y) and the reduction ratio (r) to a coefficient generation circuit 10. The memory access circuit 9 generates (2r'X2r') neighboring grid coordinates Pi (i=1, 2, 3,...) having a point P as the center, and accesses original image memory 3. An arithmetic circuit 11 performs the sum of products arithmetic operation SIGMACiXSi by neighboring block data Si from the original image memory 3 and by a coefficient Ci from the coefficient formation circuit 10, and calculates a transform picture element values that is conversion data at the coordinate P (X, Y).
申请公布号 JP3381075(B2) 申请公布日期 2003.02.24
申请号 JP19920298650 申请日期 1992.11.09
申请人 发明人
分类号 G09G5/36;F28D1/04;G06T3/00;G06T3/40;H04N1/387;H04N1/393 主分类号 G09G5/36
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