发明名称 |
SEMICONDUCTOR DEVICE HAVING SUPER LATTICE STRUCTURE SEMICONDUCTOR LAYER AND ITS FABRICATION METHOD, ESPECIALLY HAVING REDUCED INPUT POWER AND IMPROVED ENDURANCE |
摘要 |
PURPOSE: A semiconductor device having a super lattice structure semiconductor layer and its fabrication method are provided to reduce series resistance without reducing optical confinement. CONSTITUTION: The semiconductor device includes a super lattice structure semiconductor layer stacked with the first material layer(581) and the second material layer(582) in turn. A number of holes(581a,582a) are formed in each of the first and the second material layer, and each hole of the corresponding material layer is filled with a material of other adjacent material layer. The super lattice structure is a p-type semiconductor layer, and has a structure of GaN/AlGaN.
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申请公布号 |
KR20050017685(A) |
申请公布日期 |
2005.02.23 |
申请号 |
KR20030053889 |
申请日期 |
2003.08.04 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HA, KYOUNG HO;KWAK, JOON SEOP;LEE, SUNG NAM;LEE, WON SEOK;PAEK, HO SUN;SAKONG, TAN |
分类号 |
H01S5/343;B82Y20/00;H01L29/15;H01L29/20;H01S3/0941;H01S5/22;H01S5/223;H01S5/32;H01S5/323;(IPC1-7):H01S3/094 |
主分类号 |
H01S5/343 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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