| 发明名称 | Method and apparatus of instruction scheduling using software pipelining | ||
| 摘要 | A modulo scheduling method including calculating at least two candidate initiation intervals between adjacent iterations, searching for schedules of the instructions in parallel by using the candidate initiation intervals, and selecting a schedule determined to be valid from among the searched schedules. | ||
| 申请公布号 | US9383981(B2) | 申请公布日期 | 2016.07.05 |
| 申请号 | US201414508318 | 申请日期 | 2014.10.07 |
| 申请人 | SAMSUNG ELECTRONICS CO., LTD. | 发明人 | Ahn Min-wook;Kim Won-sub;Jin Tai Song;Lee Seung-won;Lee Jin-seok;Im Chae-seok |
| 分类号 | G06F9/30;G06F9/45 | 主分类号 | G06F9/30 |
| 代理机构 | Staas & Halsey LLP | 代理人 | Staas & Halsey LLP |
| 主权项 | 1. A method of modulo scheduling instructions for processing a loop, the method comprising: obtaining at least two candidate initiation intervals between adjacent iterations; generating N schedulers according to a number N of the obtained candidate initiation intervals; searching for N schedules with respect to the candidate initiation intervals in parallel via the N schedulers; and selecting a schedule determined to be valid from among the searched schedules. | ||
| 地址 | Suwon-Si KR | ||