发明名称 PULSE GENERATING CIRCUIT
摘要 PURPOSE:To reduce power of input pulse and lower power consumption by charging bootstrap capacity by a precharge pulse applied before inputting an input pulse. CONSTITUTION:When a precharge pulse phiP becomes high level, MOSFETQ2, Q3, Q12, Q14 become on. Accordingly, MOSFETQ8, Q10 become on, and bootstrap capacity CB is precharged through Q14, Q8. When phiP becomes low level and input pulse phi1 becomes high level, MOSFETQ1, Q11, Q7, Q9 become on and gate voltage of MOSFETQ6 becomes higher than power source voltage by self bootstrap effect, and Q7, Q9 become on sufficiently. When Q8, Q10 become off with time delay, an output pulse phi2 becomes high level, and voltage of capacity CB is applied to the gate through MOSFETQ13 and the pulse phi2 becomes close to power source voltage.
申请公布号 JPS5834626(A) 申请公布日期 1983.03.01
申请号 JP19810131537 申请日期 1981.08.24
申请人 HITACHI SEISAKUSHO KK 发明人 CHIBA YUKINOBU
分类号 H03K5/02;H03K17/06;H03K17/687;H03K19/017 主分类号 H03K5/02
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