发明名称 CONTROL METHOD FOR CACHE MEMORY
摘要 PURPOSE:To improve the hit rate of a data at memory access by controlling a split block being a storage unit of a cache memory to have a split number or capacity or the like in response to a program or the like to be executed. CONSTITUTION:A variable length cache memory 5 is adopted and, for example, a split number (n) of split blocks BL0-BLn-1 of the cache memory 5 is made variable to change the capacitance of each of the split blocks BL0-BLn-1. A history data such as memory operating state, memory access pattern or frequency of user or the like corresponding to a prescribed software program to be executed is written in a history memory 4 in advance and the split block length of the cache memory 5 is controlled depending on the history of the memory access. Thus, the hit rate of data at memory access is increased.
申请公布号 JPS63106849(A) 申请公布日期 1988.05.11
申请号 JP19860253061 申请日期 1986.10.24
申请人 SONY CORP 发明人 ENOMOTO TAKAAKI
分类号 G06F12/08;G06F12/12 主分类号 G06F12/08
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