发明名称 REPEATER CIRCUIT HAVING RANDOM ACCESS MEMORY
摘要 <p>PURPOSE:To multiplex plural channels in one and the same circuit and to reduce the scale of the circuit by using a random access memory for the repeater circuit. CONSTITUTION:An external effective bit is inputted to an effective bit control means 1 to control a 1st random access memory 2 to store the effective bit into the memory 2 and to read the effective bit stored in the memory 2, and inputted again to the effective bit control means 1 and the operation above is repeated sequentially. Every time the said operation is implemented once, the effective bit is shifted by one frame each. Moreover, the shifted effective bit and a speed selection signal are inputted to a write control section 3 to generate a pulse in response to the communication speed and the pulse is used for a write signal of a 2nd random access memory 4. Thus, plural channels are multiplexed in one and the same circuit to reduce the scale of the repeater circuit.</p>
申请公布号 JPH0358640(A) 申请公布日期 1991.03.13
申请号 JP19890196329 申请日期 1989.07.27
申请人 FUJITSU LTD 发明人 NISHIDA MITSUHIRO
分类号 H04J3/06;H04L7/00 主分类号 H04J3/06
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